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HA13609ANT three-phase brushless motor driver ade-207-232 (z) 1st. edition may 1997 description the HA13609ANT is a 3-phase brushless motor driver ic with digital speed control. it is designed for use as a ppc or lbp scanner motor driver and provides the functions and features listed below. function power mos and power bipolar transistor driver circuits 16-bit serial interface variable-speed digital speed control circuit digital pll digital ready circuit pwm oscillator circuit charge pump circuit integrating amplifier circuit current limit circuit overshoot prevention circuit braking function (with braking compete signal) forward/reverse direction circuit hall open circuit protection watchdog timer (lvi, por, and rst outputs) stuck rotor protection features high breakdown voltage (50v/30ma) power transistor drive circuit pwm drive variable speed control is possible (varying the servo filter constants is not required) selectable rotation control method (discriminator control, pll plus discriminator control) selectable feedback type (voltage or current) allows both pwm frequency switching and 100% duty operation selectable current limiting level braking mode selection (reverse braking, regeneration braking)
HA13609ANT 2 block diagram + wave- form shaping hu 42 41 40 39 38 37 hv hw r101 v ss v ss r126 r127 20 r102 22 8 rst c108 7 monitor output (ready: low) 4 data out 1 clk f max = 8 mhz 2 enable 3 data + + open circuit protection matrix rwd/fwd r/f p.o.r l.v.i 1.25 v brake brake over- shoot preven- tion fh 3 36 35 34 33 32 31 u+ u v+ v w+ w u u v v w w 25 c102 v ps 21 c101 v ss (5 v) hall amplifier osi no/8 counter motor on brake (2 bit) duty 100 ready o.s.i on v ref (2 bit) mask control rwd/fwd d1 (2 bit) d2 (2 bit) pll sel or icp, pc on vp (3 bit) f pwm (2 bit) mode sel serial port (16 bits) 6 + mr 29 28 v ss fh 3 rotation monitor output amp d1 d1 5 speed clk (0.2 to 5 khz) 9 osc d2 1 m 8 mhz max 20 p 20 p d2 10 pll 13 ready ready 4, 8% discrimi- nator 14 r4 r5 c4 pwm osc 12 c106 + duty 100 + 27 17 40 k f pwm (open collector) (push-pull) current feedback input error amplifier input error amp pwm comp. + 26 mask current sense mask v ref 24 v ref v ss r106 r107 programmable discriminator (1024 to 4095) c105 23 vp vp 19 r1 charge pump + buffer 1.1 v 18 15 icp 2 + cont. integral 16 precharge pc c3 r3 r7 r6 11 30 v ss = bip use 10 to 50 v= mos use 1.4 v stuck rotor protector
HA13609ANT 3 pin functions pin no. pin name function 1 clk serial port reference signal input 2 enable serial port data write/latch signal input 3 data serial port data input 4 data out serial port data transfer complete signal output 5 speed clk speed command signal input 6 tacho out rotation monitor (mr, hall 3) output 7 ready ready and braking done (no/8) output (open collector output) 8 rst power supply (v ss ) monitor output. high when a reduced power-supply voltage is detected. 9 osc in oscillator circuit input. reference signal for all circuits other than the serial port. 10 osc out oscillator circuit output 11 s-gnd small-signal ground 12 pwm osc connection for the capacitor that sets the oscillator frequency. 13 pll out speed clk vs. speed detection signal speed comparison output 14 dis out speed clk vs. speed detection signal phase comparison output 15 integ in integrating amplifier input 16 cp out charge pump and integrating amplifier output 17 error amp in error amplifier input 18 buffer out buffer amplifier output. connect to pin 17 when current feedback is selected. 19 r1 charge pump output current and pwm oscillator frequency setting 20 lvi reduced voltage detection level setting 21 v ss small-signal circuit power supply. 5.5v maximum 22 por power-on reset delay time setting 23 lock pro motor rotation constraint mode coil current on/off time setting 24 v ref current limit setting 25 v ps output driver power supply. 50v maximum 26 c sense motor coil current detection 27 c f b current feedback input 28 mr in speed detection input 29 mr in + speed detection input 30 p-gnd output driver ground
HA13609ANT 4 pin functions (cont) pin no. pin name function 31, 33, 35 u , v , w lower arm driver push-pull output. driven by a pwm signal. (connect power nmos or npn transistors.) 32, 34, 36 u, v, w upper arm driver open drain output. (connect a power pmos or pnp transistor.) 37 to 42 u+, u v+, v w+, w hall signal inputs
HA13609ANT 5 serial port input data structure a4 msb a3 a2 a1 a0 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 lsb a0 = 1 dummy mode control a0 = 0 dummy data control data out data clk enable serial port (16 bits) a0 data control mode control decoder mode control register (11 bits) a0 = 1 data control register (11 bits) a0 = 0 mode control register (a0 = 1) md6 md7 v ref 0 0 v ref 2 1 0 ? 1 0 1 ? 0.75 1 1 ? 0.5 bit md0 md1 md2 md3 md4 md5 md6 md7 md8 md9 md10 symbol motor on brake 1 brake 2 duty 100 ready o.s.i on v ref 1 v ref 2 mask control r/f 1 motor on active 2 discriminator reverse duty 100% 4% motor off non active 1 discriminator + pll forward duty 8% md1 md2 brake *3 *2 *1 0 0 off 1 0 brake 1 0 1 brake 2 1 1 brake 3 0
HA13609ANT 6 data select register (a0 = 0) bit dd0 dd1 dd2 dd3 dd4 dd5 dd6 dd7 dd8 dd9 dd10 symbol d1 a d1 b d2 a d2 b pllsel1 or icp pllsel2 or pc on vp1 vp2 vp3 f pwm1 f pwm2 1 dd0 dd1 d1 dd6 dd7 dd8 vp (v) dd2 dd3 d2 dd4 dd5 pll out(vp-p) 0 0 1/1 0 0 0 2.2 0 0 1/1 0 0 100% dd9 dd10 f pwm *5 *4 *6 0 0 f pwm 1 1 0 1/2 1 0 0 +0.15 1 0 1/2 1 0 ? 75% 1 0 ? 1.4 0 1 1/4 0 1 0 +0.3 0 1 1/4 0 1 ? 50% 0 1 ? 1.9 1 1 1/8 0 0 1 +0.45 1 1 0 +0.6 1 0 1 ?.15 0 1 1 ?.3 1 1 1 ?.45 1 1 1/8 1 1 ? 25% 1 1 ? 2.8 0 notes: 1. off: the brake function does not operate. brake 1: braking up to no/8. brake 2: braking up to no/8, and then regenerative braking. brake 3: regenerative braking. the no/8 signal is output. during a braking operation, when the mr frequency when braking completes cannot be detected in the circuit (during braking, the speed detection signal for under setting is not output over the 2/d1 occurrence. thus this occurs more easily for lower settings.), reverse rotation may continue in some cases. note that this bit is also used to set the rotation monitor output (fh 3 or the mr frequency). fh 3 is only output from the rotation monitor when motor on (md0 = 1) and brake 3 are selected. 2. the ready setting range has the following manufacturing variation: 4.3% 25% (@md4 = 1) 8.6% 25% (@md4 = 0) 3. this function masks the current limiter input (pin 27) (incorrect operation due to the recovery current). see page 20 for details. 4. the pll output setting indicates a change relative to 3.5 vp-p. see the electrical characteristics. this is valid when md9 = 0 (pll control). note that dd4 also functions as the icp selection in discriminator control mode. icp = v r1 4 ?r1 dd4 = 1 . . . . . icp 2 dd4 = 0 . . . . . icp 1 @md9 = 1
HA13609ANT 7 dd5 also controls the pc on function to reduce motor rotation overshoot when md9 is 1 (discriminator control). this function does not operate when d9 is 0. the precharge voltage (i.e., the integrator output voltage initial clamp voltage) can be set by vp1 to vp3 (dd6 to dd8). the figure shows the precharge operation. no md0 or md10 0 v integrator output vp ready lock range (md4) precharge 5. the vp setting indicates the change relative to 2.2v. see the electrical characteristics. 6. indicates the change relative to f pwm . see the setting formula.
HA13609ANT 8 timing chart (forward mode) 0 + v ol v ol v ol hu hv hw vhys hall amplifier input u output v output w output pwm pwm pwm pwm pwm pwm v ol u output v ol v output v ol w output v oh1 v oh1 v oh1 v oh v oh v oh
HA13609ANT 9 serial port timing chart enable clk data data out tsu th th 50% 50% 50% 50% tw tw tsu tsu th tsu tsu td1 td2 50 nsec 50 nsec a4 a3 d1 d0 tr, tf < 20 nsec, tsu, th > 20 nsec tw > 40 nsec the tr and tf times are stipulated at 10% and 90%, respectively. braking function input and output logic serial port input output motor on (md0) brake 1 (md1) brake 2 (md2) r/f (dd10) rotation direction braking 1 * * 0 forward off *1 * * 1 reverse off 0 0 0 * off *2 * * 0 reverse brake *3 * * 1 forward notes: 1. off: the braking function does not operate. 2. the ic goes to standby mode. 3. see the description of mode control for details on the braking operation.
HA13609ANT 10 forward mdo (motor on) braking set braking or regeneration braking n1 0 n2 md10 (r/f) md1 (brake1) to md2 (brake2) rotation monitor output set rotation monitor output set * 2 * 3 tset up * 1 braking set * 3 thold * 3 tset up n2 n1 n1 ready ready ready no/8 detection * 4 speed clk input monitor output (open drain) regene- ration braking reverse notes: 1. 2. 3. 4. the ic goes to standby mode when motor on, brake1, and brake2 are all 0. hold the data values here. thold, tset up > the no/8 (braking completion) function does not operate when brake1 and brake2 are 0. note that the no/8 detection signal is initialized to the high level in the mode in note 1 ( standb y mode ) . 4 1 f speed clk
HA13609ANT 11 basic application circuit (bipolar transistor circuit, discriminator + pll, voltage feedback, and hall elements) hu 42 41 40 39 38 37 hv hw r101 v ss v ss r126 r127 20 r102 22 8 lvi c108 7 p.o.r 4 data out 1 clk 2 enable 3 data 36 35 34 33 32 31 u+ u v+ v w+ w u u v v w w 25 v ss 21 c101 mpu 5 mr 29 28 v ss speed clk 6 9 x?al c103 13 14 r4 r5 c4 27 17 26 24 v ss r106 r107 c105 23 19 r1 18 15 16 c3 r3 r7 r6 11 30 rst monitor output rotation monitor output 10 c104 r105 mr in+ mr in osc in osc out v ps v ss discrimi- nator pll c106 12 r108 r109 c107 r114 r110 r115 r112 r116 r117 r111 r118 r113 r119 v ps r nf d1 d2 d3 d4 d5 d6 q1 q2 q3 q4 q5 q6 r120 current limiter pwmosc v ref lock protection current feedback input error amplifier input buffer amplifier output integrator output integrator input
HA13609ANT 12 application circuits application circuit 1 (discriminator) 13 14 17 19 r1 18 15 16 c3 c1 discrimi- nator pll error amplifier input buffer amplifier output integrator output integrator input r2 application circuit 2 (mos transistor circuit) 36 35 34 33 32 31 u u v v w w 25 c102 v ps v ss r108 r109 r114 r110 r115 r112 r116 r117 r111 r118 r113 r119 v ps r nf d1 d2 d3 d4 d5 d6 m1 m2 m3 m4 m5 m6 zd1 zd2 zd3 21 v ss c101
HA13609ANT 13 application circuit 3 (current feedback) r121 c110 27 17 18 current feedback input error amplifier input buffer amplifier output r nf r125 application circuit 4 (hall ic input) ic 42 41 40 39 38 37 r122 v ss u+ u v+ v w+ w v ss 21 c101 v ss r103 r104 ic r123 ic r124 application circuit 5 (external reset input) v ss r126 20 22 8 lvi c108 p.o.r rst external reset input h: standby
HA13609ANT 14 external components part no. recommended value purpose note r101, r102 hall element bias current 12 r103, r104 hall ic applications, hall input voltage 14 r105 1m w oscillator stabilization r106, r107 current limiter reference voltage 15 r108 to r113 power transistor base current limiter 16 r114 to r119 power transistor base-emitter resistors (gate-source resistors) 16 r120 3 4.7k w current limiter filter 13 r121 current feedback input filter 9 r122 to r124 hall ic output current 14 r125 current feedback input gain adjustment 10 r126, r127 lvi operating voltage, external reset input pull up 11 r nf current detection 1 r1 3 1.5k w integration constant, pwm carrier frequency 2, 3, 5 r2 integration constant 2 r3 to r7 integration constant 3 c101, c102 3 0.1 m f power supply stabilization c103, c104 10p to 50pf oscillator stabilization 7 c105 lock protection operation time 4 c106 pwm carrier frequency 5 c107 current limiter filter 13 c108 power-on reset delay time 11 c110 current feedback input filter 9 c111 to c113 hall output stabilization 8 c1 integration constant 2 c2 integration constant 2 c3, c4 integrator filter 3 zd1 to zd3 ? 20v mos power transistor gate destruction protection 8 d1 to d6 fly wheel diodes 8 x?al 4 to 8mhz oscillator 6, 7 notes: 1. current limiter operates according to the following formula: iop = v ref r nf [a] here, v ref is the value according to the v ref select function.
HA13609ANT 15 2. use the following formulas as a guideline for setting the integration constant (@md9 = 1). to minimize rotation deviation, set r1 to a relatively small value. w o r1 = however, r1 must be in the range 1.5k w r1 15k w . 2 p 20 ?f mr ?d1 9.55 ?v r1 ?k t ?r2 4 ?j ? w o ?no ?a [rad/s] [ w ] c1 = 1 / ( ? 10 ? w o ?r2) c2 = 10 ?c1 [f] [f] here, no : rotation speed [min ? ] f mr : mr frequency [hz] d1 : divider determined by d1 select v r1 : charge pump bias voltage 1.16 [v] k t : motor torque constant [n?/a] j : motor moment of inertia [kg? 2 ] a : pwm comparator current gain [a/v] 2vps ?0.83v e ?vsat rm ?vosc voltage feedback method: a = current feedback method: a = g b r nf v ps : power system power-supply voltage [v] v e : motor back emf [v p-p /t?] vsat : external transistor saturation voltage [v] (see the electrical characteristics) rm : motor coil resistance [ w /t?] vosc : pwm amplitude voltage [v p-p ] (see the electrical characteristics) g b : buffer amplifier gain [v/v] (see the electrical characteristics) 3. use the following formulas as guidelines for setting the integrator filter: first determine the angular frequency of w p for dis out and pll out. w p = 2 p ?f mr ?d1 [rad/s] determine the angular frequency of w m for motor. w m ? 9.55 no ?t l 1 j k t vref r nf [rad/s] determine the w o. w o = ?w p ? w m [rad/s] determine the integrator? dc gain g (e) . 1 z ?d1 ?2 p ? k ?pll sel j ? w o 9.55 ?k t ?a g (e) = 60 w o here, k : pll gain = 0.28 [v/rad/s] t l : rated load torque [n?] pll sel : pll output ratio vref : current limiter reference voltage [v] z : mr pulse per round [p/r]
HA13609ANT 16 set c3 and derive the integration constants from following formulas. r6 = 0 w 1 w p ?c3 r3 = r3 g (e) r5 = 1 2 ?r5 ? w o c4 = r7 = r5 next, determine r4 to match the phase of pll out. r4 = (3.46 ?v p ) r3 (v p ?1.2) ?(1.9 ?v p ) ?r3 / r5 here, v p : see the electrical characteristics. when log w p / w m is greater than 2, a phase advance to compensate for this phenomenon is required. use the following formula to set the phase advance; c5 ?r8 > 20 ?2 w p r4 r8 c5 r5 r6 r7 c4 dis pll 4. the following formulas determine the stuck rotor protect detection time t lp (detects the current limiter operating time), the output off time t off , and the setup time t set . the figures show the operating waveforms. t lp = t off = t set = d v1 isink ?c105 ? 0.09 10 6 ?c105 d v2 isource ?c105 ? 0.32 10 6 ?c105 v lh2 is ?c105 ? 0.0005 10 6 ?c105 [sec] [sec] [sec] see the electrical characteristics for the definitions of d v1, d v2, isink, isource, and is. 0 standby (md0k to 2 = low) v lh1 enable v lh2 v ll 0 current limiter operation lock protect pin t set t lp t off t lp output off d v1 d v2 i rnf note that a capacitor with a leakage current sufficiently smaller that isource must be used for c105.
HA13609ANT 17 5. the pwm carrier frequency f pwm is determined by the following formula: f pwm = 0.0489 1 c106 ?r1 [hz] 6. the relationships between the crystal oscillator frequency f osc and the speed command clock f clk , the speed detection signal f mr , and the discriminator resolution (number of counts) c are shown below. f clk = f mr ?1 f osc = f clk ? / d2? [hz] however, c must be in the range 1024 c 4095 here, d1 : the mr signal divisor determined by d1 select d2 : the crystal oscillator frequency divisor determined by d2 select. 14 r4 r5 c4 19 r1 15 16 c3 r3 r7 r6 pll output 13 discrimi- nator vp ? buffer amplifier 4icp charge pump discriminator (1024 to 4095) pll pll sel 4% pulse discriminator counter setting clk counter x?al f osc speed clk f clk speed signal f mr f mr d1 d2 configuration of the speed control and phase control blocks when @md9 = 0 note: if possible, tr and tf for the speed clk signal should be under 20 ns when using this circuit. discriminator output
HA13609ANT 18 f mr' a a acc acc a 4% a 4% acc acc dec dec acc acc d vo ? 3.6 v ? 0 v ? 3.6 v ? 1.85 v ? 0 v discriminator output integrator output pll output timing in phase control mode 19 r1 16 c2 buffer amplifier 4icp charge pump discriminator (1024 to 4095) discriminator counter setting clk counter x?al f osc speed clk f clk speed signal f mr f mr d1 d2 configuration of the speed control block when @md9 = 1 note: if possible, tr and tf for the speed clk si g nal should be under 20 ns when usin g this circuit. r1 c1 r2
HA13609ANT 19 7. the table below lists reference values for the stabilization capacitors c103 and c104 for the crystal oscillator element according to the frequency used. x?al (mhz) c103, c104 (pf) 4 to 6 ? 20 to 40 6 to 8 ? 10 to 20 use a resonance resistance of under 50 w as a criterion for selecting the crystal element used. 8. include these components if required. 9. the cutoff frequency of the filter formed by c110 and r121 should be between 3 and 10 times the pwm oscillator frequency. 10. the gain, g ctl , from the error amplifier input to r nf is given be the following formula: g ctl = 1 + rif r125 11. the formulas below determine the relationship between capacitor c108, which sets the power on reset (por) delay time, and the resistors r126 and r127, which set lvi. v lvi = v sd 1 + r126 r127 [v] however, v lvi > 3v v hys = r126 ?i hys [v] however, v lvi ?v hys > 2.5v t por = 0.052 10 6 ?c108 [sec] the time t por is the time required for the oscillator to reach stability. this time should be 20ms or longer. v ss por rst v lvi < 2.0 v 2.0 v 1.3 v 0 v 0 v 0 v t por t por v hys v sd , i hys : see the electrical characteristics. when using an external reset input to set the ic to the standby state, pin 20 must be set to a low level that is under 0.4v. 12. when the hall inputs are common mode input, the open circuit protection circuit makes the output transistors non-operational. when all the hall input phases are open, the lower side output transistors become non-operational. the output transistors will be disabled if one or two phases are disconnected (become open) only when the hall inputs are common mode.
HA13609ANT 20 13. when setting up the current limiter filter consisting of r120 and c107, r120 should be 4.7k w or larger, and c107 and r120 should function as a filter for the recovery current. this filter masks the recovery current due to internal circuits for the current limiter input (pin 26) and the c107 discharge operation determines the pwm off time (by making the current limiter input a low impedance). see the figures. output ( u to w ) v rnf current limiter input voltage (pin 26) c107 discharge t mask t mask ? 0 v on on 1/f pwm for recovery current masking: t mask = [sec] 64 fosc to @md8 = 1 48 fosc t mask = [sec] 32 fosc to @md8 = 0 24 fosc 14. use the formula below as a guideline for determining the values of r103, r104, and r122 to r124 when a hall ic is used. r103 // r104 = r122 to r124 < 20k w 15. take the current limiter input current (see the electrical characteristics) into consideration when determining the values for r106 and r107. 16. determine the values of r108 to r119 based on the characteristics of the output power transistors used and the output driver characteristics (see the electrical characteristics). 17. design the wiring in applications so that the potential of the pin 11 ground (the small-signal ground) does not become higher than that of the pin 30 ground (the output stage ground) as shown in the figure. 11 30 v ss
HA13609ANT 21 absolute maximum ratings item symbol rated value unit note power-supply voltage v ss 5.5 v 1 v ps v ss to 50 v 2 input voltage v in v ss v3 output voltage vout 50 v 4 output current iout 30 ma 5 allowable power dissipation p t 0.8 w operating temperature topr ?0 to 70 c storage temperature tstg ?5 to +125 c notes: 1. a surge voltage of 6.0v is allowed for up to 10ms. note that the operating range is as follows: v ss = 4.25 to 5.5v 2. the maximum is vss if bipolar transistors are used as the output transistors. the maximum is 50 v if bipolar transistors are used as the output transistors. 3. applies to the logic input pins 1, 2, 3, 5, and 9, and to the analog input pins 17, 20, 24, 26 to 29, and 37 to 42. 4. applies to the output pins 32, 34, and 36, and to pin 7, the monitor output pin. 5. applies to the output pins 31 to 36. the maximum value for the monitor output pin is 10ma.
HA13609ANT 22 electrical characteristics item symbol min typ max unit test condition applicable pins notes current drain i sso 3.0 6.5 ma md0 to 2 = 0, v ss = 5.5v 21 6 i ss 15 25 ma md0 to 2 = 1, v ss = 5.5v i pso 0.13 0.5 ma md0 to 2 = 0, v ps = 50v 25 6 i ps 2.5 3.5 ma md0 to 2 = 1, no load, v ps = 50v logic inputs input low- level current i il ?0 ?00 m a 1 to 3, 5, 9 input high- level current i ih ? 10 m a input low- level voltage v il 1.5 v input high- level voltage v ih 3.5 v clock frequency f clk 4 20 mhz 9 logic outputs output high- level voltage v oh1 3.5 4.6 v i oh = 0.5ma 4, 6, 8, 10 output low- level voltage v ol1 0.25 0.4 v i ol = 0.5ma hall amplifier input resistance rh 10 25% k w 37 to 42 common- mode input voltage range vh 1.5 v ss ?.5 v differential- mode input voltage range vd 70 v ss /2 mv hysteresis v hys 40 mv rh = 400 w 1, 2 output drivers output high- level voltage v oh2 v ps ?.8 v ps ?.6 v i o h = 20ma, v ps = v ss 31, 33, 35 v oh2 10 12.5 15 v i o h = 1ma, v ps = 24v v oh2 5.5 9.0 v i o h = 1ma, v ps = 12v
HA13609ANT 23 electrical characteristics (cont) item symbol min typ max unit test condition applicable pins notes output drivers output leakage current i leak 100 m av oh1 = 50v 32, 34, 36 output low- level voltage v ol2 0.15 0.3 v i ol = 20ma 31 to 36 output response time t phi 1.0 m si o = 10ma 3 t plh 1.0 m s pwm oscillator and oscillator low- level voltage v l 1.1 10% v 12 pwm com- parator oscillator high- level voltage v h 2.8 10% v oscillator frequency range f pwm 2 30 khz 2 oscillator frequency precision ferr1 7.7 10% khz f pwm 1, r1 = 6.2k w , c106 = 1000pf comparator hysteresis v phys 50 mv 2 current limiter input current i in1 10 m a vi = 0 to 2v 24, 26 offset voltage v off ?5 ?5 ?0 mv vi = 0.5 to 2v 26 speed detection amplifier common-mode input voltage range v cm 1.5 v ss ?.5 v 28, 29 differential- mode input voltage range v diff 60 v ss mv p-p gain gain 32 db f = 1khz 2 input current i in2 20 m a vi = 1.4v i 28 ?46 ?5 ?2 m a vi = 0v i 29 ?7 ?3 ?9 m a vi = 0v input current ratio iratio 1.45 2.25 i 28 / i 29 input sensitivity v s 15mv 6 2
HA13609ANT 24 electrical characteristics (cont) item symbol min typ max unit test condition applicable pins notes clock oscillator oscillator frequency range fosc 4 mhz x?al 9, 10 oscillator frequency precision ferr2 0.01 % x?al = 8mhz 2 program -mable count range n 1024 4095 count 14, 16 discrimi- nator operating frequency fdis 20 mhz 4 count error dc 0 1lsb charge pump r1 voltage v r1 1.16 10% v r1 = 1.5k w 19 charge current i cp+ 190 10% m a r1 = 1.5k w ,16 discharge current i cp 190 10% m a vo = 2.0v current ratio i cp+ /i cp 0.8 1.0 1.2 leakage current ioff1 100 na vi = 1.5v clamp voltage vclamp 2.8 3.0 v digital ready lock range manufacturing variation d n 25 % 7 pre- charge clamp voltage (1) vcp(1) vp 10% v 16 buffer amplifier internal reference voltage vref 1.15 10% v 16 output resistance ro 9.8 14 18.2 k w 18 maximum output voltage v b(max) 0.7 10% v voltage gain g b ? ? ? db error amplifier input current i in3 150 na vi = 1.5v 17, 27 offset voltage voff ?5 ?0 mv voltage gain ge 60 db vi = 2.5v 2 gain-bandwidth product be 0.1 mhz 2 feedback resistance rif 40 25% k w v ss = 5v
HA13609ANT 25 electrical characteristics (cont) item symbol min typ max unit test condition applicable pins notes inte- grating amplifier internal reference voltage vp 2.2 10% v dd6 to 8 = 0 15, 16 internal reference voltage difference d vp 2.2+ d vp 10% v input current i in4 250 na vi = 1.5v output voltage v oh3 2.75 3.0 v io = 0.5ma v ol3 0.9 v io = 0.5ma voltage gain g i 60 db vi = 2.5v 2 gain- bandwidth product b i 0.3 mhz 2 pll and offset output high- level voltage v oh4 3.6 10% v io = 0.1ma 13, 14 discrimi- nator output output low- level voltage v ol4 0.1 0.2 v monitor output output leakage current i leak2 50 m av oh = 50v 7 output low- level voltage v ol5 0.2 0.4 v i ol = 10ma stuck rotor protector minimum detection time t lp ?0 25% ms c105 = 0.47 m f23 2 output off time t off 165 25% ms high-level v lh1 3.0 3.2 v voltage v lh2 2.5 2.7 v low-level voltage v ll 1.4 1.6 v potential d v1 1.9 10% v v lh1 ? ll difference d v2 1.35 10% v v lh2 ? ll detection-time sink current i sink ?5 30% m a pin 23 voltage = 2.5v output off source current i source 5.0 30% m a pin 23 voltage = 2.5v standby-mode source current i s 4.7 35% ma pin 23 voltage = v lh 2
HA13609ANT 26 electrical characteristics (cont) item symbol min typ max unit test condition applicable pins notes lvi internal reference voltage vsd 1.13 1.21 1.29 v turn on 20 hysteresis current i hys ?0 25% m a output voltage maintained range v lv 2.0 v 21 p.o.r delay time t por 24.5 25% ms c108 = 0.47 m f 8, 22 notes: 1. timing chart 2. design target values. these are not tested at delivery time. 3. the figure below stipulates the output response time. this is not tested at delivery time. 90% 10% t plh t phl 4. stipulated at the discriminator input frequency. 5. see the timing charts. 6. stipulated at conditions in which the osc input is fixed.
HA13609ANT 27 reference data 0 30 20 10 0 2.5 3.5 5.5 supply voltage v ss (v) current drain i ss , i sso (ma) 0 4 20 30 50 supply voltage v ps (v) current drain i ps , i pso (ma) 0 0.4 10 20 30 output current i o (ma) output driver low-level voltage v ol (v) 0 15 10 5 0 10 20 30 output current i o (ma) output driver high-level voltage v oh (v) current drain vs. supply voltage current drain vs. supply voltage output driver low-level voltage vs. output current output driver high-level voltage vs. output current 1.5 4.5 3 2 1 0 40 10 0.3 0.2 0.1 0 tj = 25 c i ss i sso i pso i ps tj = 25 c tj = ?0 c tj = 25 c tj = 125 c v ps = 50 v v ps = 50 v tj = 125 c tj = 25 c tj = ?0 c tj = ?0 c tj = 125 c tj = 25 c
HA13609ANT 28 ?0 40 70 125 junction temperature tj ( c) pwm frequency f pwm (khz) 1.4 junction temperature tj ( c) r1 voltage v r1 (v) 70 junction temperature tj ( c) error amplifier rif (k w ) junction temperature tj ( c) integrator reference voltage v p (v) pwm frequency vs. junction temperature r1 voltage vs. junction temperature error amplifier rif vs. junction temperature integrator vs. junction temperature 10 100 1.3 1.2 1.1 60 40 30 10.0 9.0 8.0 7.0 50 2.4 2.3 2.1 2.0 2.2 ?0 40 70 125 10 100 ?0 40 70 125 10 100 ?0 40 70 125 10 100 c106 = 1000 pf r1 = 6.2 k w f pwm 1 r1 = 6.2 k w
HA13609ANT 29 output current i o (ma) monitor output v ol (v) 300 junction temperature tj ( c) lock protector t lp , t off (ms) 1.4 junction temperature tj ( c) lvi reference voltage v sd (v) junction temperature tj ( c) por delay time t por (ms) monitor output vs. output current lock protector vs. junction temperature lvi reference voltage vs. junction temperature por delay time vs. junction temperature 200 100 1.3 1.1 0.4 0.3 0.2 0.1 1.2 ?0 40 70 125 10 100 ?0 40 70 125 10 100 ?0 40 70 125 10 100 30 25 15 20 0 46 10 28 0 0 tj = ?0 c tj = 25 c tj = 125 c c105 = 0.47 m t lp c108 = 0.47 m t off
HA13609ANT 30 package dimensions unit: mm 0.25 + 0.10 ?0.05 1 ?13 15.24 0.51 min 5.10 max 2.54 min 0.48 0.10 1.78 0.25 37.34 38.0 max 1.0 13.4 14.6 max 0.89 1 22 42 21 1.27 max hitachi code jedec code eiaj code weight dp-42sa sc-551-42 4.42 g
cautions 1. hitachi neither warrants nor grants licenses of any rights of hitachi? or any third party? patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party? rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi? sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail- safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi? sales office for any questions regarding this document or hitachi semiconductor products. hitachi, ltd. semiconductor & integrated circuits. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: tokyo (03) 3270-2111 fax: (03) 3270-5109 copyright ? hitachi, ltd., 1999. all rights reserved. printed in japan. hitachi asia pte. ltd. 16 collyer quay #20-00 hitachi tower singapore 049318 tel: 535-2100 fax: 535-1533 url northamerica : http:semiconductor.hitachi.com/ europe : http://www.hitachi-eu.com/hel/ecg asia (singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm asia (taiwan) : http://www.hitachi.com.tw/e/product/sicd_frame.htm asia (hongkong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm japan : http://www.hitachi.co.jp/sicd/indx.htm hitachi asia ltd. taipei branch office 3f, hung kuo building. no.167, tun-hwa north road, taipei (105) tel: <886> (2) 2718-3666 fax: <886> (2) 2718-8180 hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower, world finance centre, harbour city, canton road, tsim sha tsui, kowloon, hong kong tel: <852> (2) 735 9218 fax: <852> (2) 730 0281 telex: 40815 hitec hx hitachi europe ltd. electronic components group. whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 778322 hitachi europe gmbh electronic components group dornacher strae 3 d-85622 feldkirchen, munich germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi semiconductor (america) inc. 179 east tasman drive, san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to:

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